IEEE

Hardware Implementation of Systolic Array Architecture using 4:2 Compressor Approximate Multiplier for Image Processing Operations

Abstract: This research presents an innovative FPGA implementation of a $128 \times 128$ convolution systolic array architecture, optimized for image processing applications. The core of this design ...
IEEE

Design and Implementation of Facial Recognition Attendance System Using Raspberry Pi 4

Abstract: In this paper present attendance system using Raspberry Pi 4. If attendance is managed manually, it can impose a significant load on teachers. A sophisticated and automated management system ...
GitHub

The PyTorch implementation of Generative Pre-trained Transformers (GPTs) using Kolmogorov-Arnold Networks (KANs) for language modeling

@misc{GANESH2024KANGPT, author = {Aditya Nalgunda Ganesh}, title = {KAN-GPT: The PyTorch implementation of Generative Pre-trained Transformers (GPTs) using Kolmogorov ...